Audio 277

 

8. Клавиатура 280

 

9. Немного о флоппиках 283

 

10. Последовательный и параллельный
интерфейсы 285

 

11. Жесткие диски 296

 

12. Как настроить графическую подсистему 318

 

13. USB-интерфейс 322

 

14. Об уже забытой локальной шине VESA 323

 

15. Немного о SCSI-интерфейсе 325

 

16. Энергосберегающие технологии и прочее 331

Функции перевода в режимы
пониженного энергопотребления 338

Детальнее о режиме "Suspend" 342

Функции отключения системы 345

Функции включения системы 347

BIOS FaX menu 356

 

17. Мониторинг системы на уровне BIOS 358

 

18. Специальные функции 363

 

19. Некоторые функции серверного BIOS 366

 

20. "Защитные" функции BIOS 372

 

21. Справочные данные BIOS 373

 

22. Дополнительные заметки 377

 


16-8, A
16 Bit I/O Recovery Time
16 Bit ISA I/O Command WS
16 Bit ISA I/O Command WS
16 Bit ISA Mem Command WS
16 Bit ISA Mem Command WS(ISA)
16-bit DMA channel
16-bit Memory, I/O Wait State
2nd Channel IDE
32 Bit I/O
32 Bit Transfer Mode
640KB to 1MB Cacheability
8 Bit I/O Recovery Time
8(16)-Bit DMA Cycle Wait States
8-bit DMA channel
8-bit Memory, I/O Wait State
8-bit Recovery Delay
8-bit Recovery Enable
8-Bit Recovery Time
8-QWord Deep Merging DRAM Write Buffer
Above 1 MB Memory Test
AC PWR Loss Restart
AC'97 Audio
ACPI
ACPI Aware O/S
ACPI Control Register
ACPI Function
ACPI I/O Device Mode
ACPI Suspend Type
Adaptor ROM Shadow C800,16K
A
Adaptor ROM Shadow CC00,16K
Adaptor ROM Shadow D000,16K
Adaptor ROM Shadow D400,16K
Adaptor ROM Shadow D800,16K
Adaptor ROM Shadow DC00,16K
Adaptor ROM Shadow E000,16K
Adaptor ROM Shadow E400,16K
Adaptor ROM Shadow E800,16K
Adaptor ROM Shadow EC00,16K
Address 0 WS
Advanced Power Management
After G3 Enable
After Power Failure
AGP
AGP -2x Mode
AGP Aperture Size
AGP Master 1 WS Read
AGP Master 1 WS Write
AGP Parity Error Response
AGP SERR
AGPCLK/CPUCLK
ALE During Bus Conversion
Allocate IRQ to PCI VGA
Allow Full Line Reads
Alt Bit in Tag SRAM
Alt Bit Tag RAM
Amplitude Shift Keying
Anti-Virus Protection
APM
A
APM BIOS
Arbiter Priority on HB1
Arbitration Priority
Assign IRQ For USB
Assign IRQ For VGA
AT BUS Clock
AT Bus Clock Frequency
AT BUS Clock Selection
AT BUS Clock Selection
AT Bus Clock Source
AT Cycle Wait State
Audio
Audio Controller
Audio Device
Audio DMA Select
Audio I/O Base Address
Audio IRQ Select
Audio Options Menu
Audio Output
Audio Output Level
Auto Configuration
AUTO CONFIGURATION WITH POWER-ON DEFAULTS  
Auto Configuration(Memory)
Auto Configure EDO DRAM Tim
Auto Detect DIMM/PCI Clk
Auto Start On AC Loss
Auto Suspend Timeout
Automatic Power Up
A, B
AutoSuspendTimeout
Back to Back I/O Delay
Bank nn DRAM Type
Bank nn Numer of Banks
Base I/O address
Base Memory Address
Base Memory Size
Baud Rate
BEDO RAS Precharge
BIOS Devnode for Shadow RAM
BIOS PM on AC
BIOS Update
Boot & POST 56
Boot From LAN First 59
Boot Other Device
Boot Sequence
Boot Speed
Boot To OS/2
Boot Up Floppy Seek
Boot Up Num-Lock
Boot Up Numlock Status
Boot Up System Speed
boot virus detection
BOOT-ROUTINE
BootSector Virus Detection
BootSector Virus Protection
BOOTSTRAP LOADER
Boot-time Diagnostic Screen
Branch Target Buffer
B, C
Burst Refresh
Burst Write Combining
Bus Concurrency
Bus Mastering
Byte Merge
Byte Merge Support
Byte Merging
C000 Shadow Cacheable
C000,16K Shadow
C400,16K Shadow
C800,16K Shadow
C8000-CBFFF Shadow
Cache Base 0-512k
Cache Base 512-640k
Cache Bus ECC
Cache DRAM Memory Area
Cache Extended Memory Area
Cache Memory
Cache Memory Regions
Cache Performance
Cache Rd+CPU Wt Pipeline
Cache Strategy
Cache System BIOS Area
Cache Timing
Cache Video BIOS Area
Cache XXXX-XXXX
Cached DRAM
CAS Before RAS
CAS Before RAS Refresh
C
CAS Output Delay
CAS Width in Read Cycle
CAS# Latency
CAS# Latency
CAS# Latency Clocks
CAS# Pulse Width
CAS# Write Pulse Width
CAS-to-RAS Refresh Delay
CAS-to-Read Delay
CC00,16K Shadow
CC000-CFFFF Shadow
CD Hole
Change Language Setting
Chassis Fan Speed
Chipset I/O Wait States
Chipset NA# Asserted
Chipset Special Features
Clear Event Log
Clear NVRAM on Every Boot
Clock for Spread Spectrum
COM Port Address
COM1/2 MIDI
Command per Cycle
Concurrent Refresh
Configuration Mode
Configuration Mode(Function)
Console Redirection Submenu
CPU Addr. Pipelining
CPU ADS# Delay 1T or Not
C
CPU BIST Enable
CPU Burst Write
CPU Burst Write Assembly
CPU Bus Frequency
CPU Bus/PCI Freq
CPU Clock/Spread Spectrum
CPU Critical Temperature
CPU Dynamic-Fast-Cycle
CPU External Cache
CPU fan on temp high
CPU Fan Speed
CPU Fast String
CPU Freq Ratio
CPU Freq Select
CPU Frequency (MHz)
CPU Frequency Control
CPU Host Clock
CPU Host Clock Select
CPU Internal Cache
CPU L2 Cache ECC Checking
CPU Level 1 Cache
CPU Level 2 Cache
CPU Level 2 Cache ECC Check
CPU Level 2 ECC checking
CPU Line Read
CPU Line Read Multiple
CPU Line Read Prefetch
CPU MicroCode Updation
CPU Mstr DEVSEL# Time-out
C
CPU Mstr Fast Interface
CPU Mstr Post-WR Buffer
CPU Mstr Post-WR Burst Mode
CPU Multiple Read Prefetch
CPU Multiple Reads
CPU Operating Speed
CPU Pipeline Function
CPU Priority
CPU Ratio
CPU Read Multiple Prefetch
CPU Read Prefetch
CPU Serial Number
CPU Sleep Pin Enable
CPU Speed
CPU Temperature
CPU to DRAM Page Mode
CPU to PCI Buffer
CPU to PCI Burst Memory Write
CPU to PCI Burst Write
CPU to PCI Byte Merge
CPU to PCI POST/BURST
CPU to PCI Read Burst
CPU Warning Temperature
CPU/PCI Burst Mem. Write
CPU/PCI Post Mem. Write
CPU/PCI Post Write Delay
CPUFAN Off in Suspend
CPUID Instruction
CPU-to-AGP 1WS Burst Write
C
CPU-to-AGP Dynamic Bursting
CPU-to-AGP Post Writes
CPU-to-DRAM 8 QW FIFO
CPU-to-DRAM Buffer Timing
CPU-to-DRAM Byte Merging
CPU-to-DRAM FIFO Cleaning
CPU-to-DRAM Posting
CPU-to-IDE Posting
CPU-to-PCI 6 DW FIFO
CPU-to-PCI Bridge Retry
CPU-to-PCI Bridge Retry
CPU-to-PCI Bursting
CPU-to-PCI FIFO Cleaning
CPU-to-PCI IDE Posting
CPU-to-PCI Post Writes
CPU-to-PCI Posting
CPU-TO-PCI Prefetch
CPU-to-PCI Read Buffer
CPU-to-PCI Read-Line
CPU-to-PCI Write Buffer
CPU-to-PCI Write Bursting
CPU-to-PCI Write Delay
CPU-to-PCI Write Latency
CPU-to-PCI Write Post
CPU-to-PCI Write Posting
CPU-to-PCI Write Waits
Critical Events in Log
Cyrix 6x86 / MII CPU ID
Cyrix M2 ADS# delay
D
D000,16K Shadow
D0000-D3FFF Shadow
D400,16K Shadow
D4000-D7FFF Shadow
D800,16K Shadow
D8000-DBFFF Shadow
Data Integrity (PAR/ECC)
Data Integrity (PAR/ECC)
Data Read 0 WS
Data Write 0 WS
Daylight Saving
DC00,16K Shadow
DC000-DFFFF Shadow
Decoupled Refresh
Decoupled Refresh Option
Default Latency Timer Value
Default Latency Timer: [Yes]
Default Primary Video
Delay For HDD (Secs)
Delay for SCSI/HDD (Secs)
Delay IDE Initial
Delay on Option ROMs
Delayed Transaction
Delayed Transaction Optimization
Delayed Transaction Timer
Deturbo Mode
Dirty pin selection
Diskette A:/B:
Diskette Controller
D
Diskette Write
Diskette Write Protect
Display Activity
Display Cache Window Size
Display Mode at Add-On ROM Init
DMA Ch N TypeF Transfers
DMA Channel
DMA Channel n
DMA Clock
DMA Clock Selection
DMA Clock Speed
DMA Line Buffer Mode
DMA n Assigned to
DMA n Used By ISA
DMA Wait States
DMA/ISA Master Before PCI
DMA-n assigned to
DMA-n Type
DPMS Supported
DRAM Auto Configuration
DRAM Burst at 4 Refresh
DRAM CAS Timing Delay
DRAM Clock
DRAM Data Integrity Mode
DRAM ECC/PARITY SELECT
DRAM ECC/PARITY Select
DRAM Enhanced Paging
DRAM Idle Timer
DRAM Integrity Mode
D
DRAM Interleave Mode
DRAM Page Closing Policy
DRAM Page Idle Timer
DRAM Page Mode
DRAM Page Open Policy
DRAM Paging
DRAM Paging Mode
DRAM Posted Write
DRAM Posted Write Buffer
DRAM RAS Only Refresh
DRAM RAS to CAS Delay
DRAM RAS# Precharge Period
DRAM RAS# Precharge Time
DRAM Read-Around-Write
DRAM Refresh Cycle Time
DRAM Refresh Method
DRAM Refresh Period
DRAM Refresh Queing
DRAM Refresh Queue
DRAM Refresh Queue Depth
DRAM Refresh Rate
DRAM Refresh Stagger By
DRAM Refresh Type
DRAM Slow Refresh
DRAM Speed
DRAM Speed Selection
DRAM Write CAS Width
Drive A
Drive B
D, E
Drive NA before BRDY
Duplex Mode
Duplex Select
Dynamic Bursting
Dynamic PCI Bursting
E0000 ROM belongs to ATBUS
E8000 - EFFFF Shadow
E8000 32K Accessible
Early PCI Bus Request
ECC Configuration
ECC Control
ECC CPU Checking
ECC Memory Checking
ECP DMA Select
ECP Mode Use DMA
Edge/Level Select
EDO DRAM Speed (ns)
EDO DRAM Speed Selection
EDO MD Timing
EDO RAS Precharge
EDO RAS Precharge Timing
EDO RAS to CAS Delay
EDO RAS# Precharge Time
EDO/SDRAM RAS# Pulse Width
Embedded SCSI BIOS
EMP Access Mode
EMP Direct Connect/Modem Mode
EMP Escape Sequence
EMP Hangup Line Sequence
E
EMP Hang-up Line String
EMP Password
EMP Password Switch
EMP Restricted Mode Access
EMS
EMS Memory Base Address
EMS Page Reg I/O Base
EMS Page(n) Addr Extension
Enable Master
Enabled DMA Channel #1(#2)
Enhanced Page Mode
Enhanced Paging
EPP Mode Select
EPP Version
Error Halt
Event Count Granularity
Event Log Capacity
Event Log Control
Event Log Count Granularity
Event Time Granularity
Ext BIOS XXXX-XXXX
Extended ALE
Extended CPU-PIIX4 PHLDA#
Extended DMA Registers
Extended I/O Decode
Extended Read-Around-Write
Extended Refresh
Extended ROM RAM Area
External Cache
E, F
External Cache
External Cache Memory
External Cache Write Policy
F000 Shadow Cacheable
Fan Control
Fan Monitor
Fan OFF at Suspend
Fan State
Fast Boot
Fast Decode
Fast Decode Enable
Fast Decode Enable
Fast DMA Only
Fast DRAM Refresh
Fast Gate A20 Emulation
Fast Gate A20 Option
Fast MA to RAS# Delay
Fast MA to RAS# Delay CLK
Fast Programmed I/O Mode(s)
Fast RAS# to CAS# Delay
Fax Modem Port
Fax Tone Count
FDD IRQ Can Be Free
First Boot Device
Flash BIOS Protection
Flash Write
Floppy 3 Mode
Floppy 3 Mode Support
Floppy Access
F, G
Floppy Access Control
Floppy Check
Floppy Disk Access Control (R/W)
Floppy Disk Controller
Floppy Drive A:/B:
Floppy Drive Seek At Boot
Floppy Drive Swap
Floppy Interface
Floppy Status
Flow Control
Force Update ESCD
Fourh Boot Device
FPM CAS# Pulse Width
FPM DRAM Addr To CAS Delay
FPM DRAM RAS# Precharge
FPM DRAM RAS# Pulse Width
FPM DRAM Write Pulse Width
FPM RAS Precharge
FPM/EDO RAMW# Timing
FPM/EDO RAS# Precharge Time
FPM/EDO RAS-to-CAS Delay
FPM/EDO Read Pulse Width
Full Cache Line Reads
Gate A20 Emulation
Gate A20 Option
Graphic Posted Write Buff
Graphics Adaptor
Graphics Aperture
Graphics Aperture Size
G, H, I
Graphics Mode Select
Green PC Monitor Power State
Halt On
Hard Disk Access Control
Hard Disk Controller
Hard Disk Power Down Mode
Hard Disk Pre-Delay
Hard Disk Time Out (Minute)
Hard Disk Timeout
Hard Disk Type 47 - RAM Area
Hardware monitor
Hardware Reset Protect
HDD Detection
HDD Power Down
HDD Power Down
HDD S.M.A.R.T. Capability
HDD Sequence SCSI/IDE First
HDD Standby Timer
Hidden Refresh
High Modem Init String
Hi-Speed Refresh
Hit "Del" Message Display
Host/DRAM Frequency
Host-to-PCI Bridge Retry
I/O Recovery Time
I/O Space Access
IBC DEVSEL# Decoding
ICH Decode Select
ICH Delayed Transaction
I
IDE (Primary Master) PIO
IDE 32-bit Transfer Mode
IDE Block Mode
IDE Buffer for DOS & Win
IDE Burst Mode
IDE Bursting
IDE controller
IDE Data Port Post Write
IDE Data Post Write
IDE DMA Transfer Mode
IDE Drive Power Down
IDE Fast Post Write
IDE FIFO Size
IDE HDD Auto Detection
IDE HDD Block Mode
IDE HDD Block Mode Sectors
IDE Master PIO Mode
IDE Multiple Sector Mode
IDE PIO Modes
IDE Prefetch Buffer
IDE Prefetch Mode
IDE Prefetching
IDE Primary(Sec.) Master(Sl) UDMA
IDE Second Channel Control
IDE Slave PIO Mode
IDE Translation Mode
Infra Red Function
InfraRed Duplex Type
Init AGP Display First
I
Init Display First
Init Display First
Initialize Display Cache Memory
Installed O/S
Integrated USB Controller
Internal Cache
Internal Cache Memory
Internal Cache WB or WT
Internal PCI/IDE
Interrupt
IR Duplex Mode
IR Function
IR Function Duplex
IR Mode Select
IR Transfer Mode
IR Transmission Delay
IR Transmission Mode
IrDA
IrDA FIR (Fast Infra Red)
IrDA MIR (Middle Infra Red)
IrDA SIR (Slow Infra Red)
IRQ #3(4)
IRQ n Assigned to
IRQ n Used By ISA
IRQ Reservation
IRQ Resources
IRQ to PCI VGA
IRQ8 Break Suspend
IRQ8 Clock Event
I
IRQ8 Resume by Suspend
IRQn
IRQ-n assigned to
ISA 16-bit I/O Wait States
ISA 16-bit I/O Wait States
ISA 16-bit Mem Wait States
ISA 16-bit Mem Wait States
ISA Bus Clock
ISA Bus Clock Frequency
ISA Bus Clock Option
ISA Bus Refresh Mode
ISA Bus Speed
ISA Clock
ISA Clock Divisor
ISA Clock Frequency
ISA Clock Frequency
ISA Clock Select
ISA Clock Select Enable
ISA Command Delay
ISA LFB Base Address
ISA LFB Base Address
ISA LFB Size
ISA Linear Frame Buffer
ISA memory area
ISA Memory Gap
ISA Refresh
ISA Refresh Type
ISA Shared Memory Base Address
ISA Shared Memory Size
I, J, K, L
ISA Slave Wait States
ISA VGA Frame Buffer Size
ISA VGA Write Combining
ISA Wait States
ISARefreshPeriod
Joystick Function
KB Power On Hot Key
KB Power On Password
KBC Input Clock
KBC Input Clock Select
Key Click
Keyboard
Keyboard auto-repeat delay
Keyboard auto-repeat rate
Keyboard Controller Clock
Keyboard Emulation
Keyboard Features
Keyboard Reset Control
Keyboard Resume
Keyboard Submenu
Keyboard Wake-up Function
Keyboard/Mouse Power On
L1 Cache Policy
L1 Cache Update Mode
L1 Cache Write Policy
L1 Update Mode
L2 (WB) Tag Bit Length
L2 Cache
L2 Cache Banks
L
L2 Cache Cacheable Size
L2 Cache Config
L2 Cache Dirty Tag
L2 Cache ECC Support
L2 Cache Enable
L2 Cache Policy
L2 Cache Tag Bits
L2 Cache Tag Length
L2 Cache Update Mode
L2 Cache Write Policy
L2 Dirty Bit
LAN Controller
LAN Remote Boot
LAN Remote Boot
LAN Wake-up
LAN Wake-up For Addon LAN
LAN Wake-up For Onboard LAN
LAN wake-up mode
Language
Language Support
Large Disk Access Mode
Latency for CPU to PCI write
Latency from ADS# status
Latency Timer
Latency Timer Value
Latency Timer: [0040]
LBA Mode Control
LBA/Large Mode
LCD&CRT
L, M
Legacy Diskette A:/B:
Legacy USB Support
Linear Burst
Linear Burst (LINBRST)
Linear Merge
LOAD FAIL-SAFE
LOAD SETUP DEFAULTS
Local Bus IDE adapter
Local Bus Ready Delay
Local Memory 15-16M
LOCK Function
Lock Setup Configuration
LOWA20# Select
M1 Linear Burst Mode
MA Additional Wait State
MA Wait State
Manual Throttle Ratio
Mark Existing Events
Mark Existing Events as Read
Master Drive PIO Mode
Master Drive Ultra DMA
Master Latency Timer (Clks)
Master Prefetch And Posting
Master Retry Timer
Max. Burstable Range
MB Temperature
Memory above 16MB Cacheable
Memory Cache
Memory Configuration
M
Memory Current
Memory Error Detection
Memory Hole
Memory Hole at 15M Addr.
Memory Hole At 15M-16M
Memory Hole Size
Memory Hole Start Address
Memory Map Hole
Memory Map Hole End Address
Memory Map Hole Start Address
Memory Parity (Error) Check
Memory Parity/ECC Check
Memory Refresh Rate
Memory Relocation
Memory Remapping
Memory Reservation
Memory Resources
Memory Test Tick Sound
Microcode Update
Midiport
Mode PIO Transfer Data
Modem Init String
Modem Ring Resume
Modem Use IRQ
Modem Wake Up
Monitor Event in Full On Mode
Mouse Controller
Mouse Support
Mouse Wake-up Function
M, N, O
MP Version
MPS 1.4 Support
MPS Revision
MPS Version
MPS Version Control For OS
MPU I/O address
MPU-401 Configuration
MPU-401 I/O Base Address
Multimedia Mode
Multiple Bit ECC Events
Multiple Monitor Support
Multiple Sector Setting
Multi-Sector Transfers
NA Delay
NA# Enable
NA# On Single Write Cycle
NA# Pin Assertion
Negate LOCK#
Num Lock
Numeric Processor Test
Numlock
Offboard pci ide card
OffBoard PCI IDE Primary(Secondary) IRQ
On Board PCI/SCSI BIOS
On LAN
On Modem Ring
On PME
ONB AHA BIOS First
ONB SCSI LVD Term
O
ONB SCSI SE Term
Onboard 496B IDE Port
Onboard AHA BIOS
On-Board Audio
On-Board Audio Address
Onboard Audio Chip
Onboard Display Cache Setting
Onboard FDC
Onboard FDC Controller
Onboard FDC Swap A&B
Onboard FDD Controller
Onboard IDE
Onboard IDE Controller
Onboard IDE-1(2) Controller
Onboard IR Function
Onboard Local Bus IDE
On-Board LPT X
Onboard Parallel Mode
Onboard Parallel Port
Onboard PCI IDE Enable
Onboard PCI SCSI Chip
Onboard SCSI
Onboard Serial Port ½
Onboard Serial Port A/B
Onboard Serial UART1/2
Onboard UART 1/2
Onboard UART 2 Mode
On-Chip IDE Controller
OnChip IDE First(Second) Channel
O, P
On-Chip PCI IDE
On-chip Primary(Secondary) PCI IDE
OnChip USB
On-Chip Video Window Size
Option ROM Scan
ORIGINAL CONFIGURATION WITH POWER-ON DEFAULTS  
OS Controlled
OS Select for DRAM>64Mb
OS/2 Onboard Memory > 64MB
Overclock Warning Message
Page Open Policy
Paging Delay
Paging Mode Control
Parallel
Parallel Mode
Parallel Port
Parallel Port DMA Channel
Parallel Port EPP Type
Parallel Port Interface
Parallel Port Mode
Parallel Port Type
Parity Error Events
Parity Mode
Password Checking
PC98 LED
PC98 Power LED
PCI 2.1 Compliance
PCI 2.1 Support
P
PCI Arbit. Rotate Priority
PCI Arbiter Mode
PCI Arbitration Mode
PCI Burst
PCI Burst Interrupting
PCI Burst Write
PCI Burst Write Combine
PCI Burst Write Combining
PCI Bursting
PCI Bus Arbitration
PCI Bus Parity Checking
PCI Bus Parking
PCI Bus Release Timer
PCI Bus Time-out
PCI Byte Merging
PCI Clock Frequency
PCI Clocks
PCI Concurrency
PCI Delay Transaction
PCI Delayed Transaction
PCI Device Search Order
PCI Device, Slot #n
PCI Dynamic Bursting
PCI Dynamic Decoding
PCI Fast Back to Back Wr
PCI IDE 1st(2nd) Channel
PCI IDE Prefetch Buffer
PCI Initial Latency Timer
PCI IRQ Activated by
P
PCI IRQ Actived By
PCI Latency Timer (PCI Clocks)
PCI Master 0 WS Write
PCI Master Access to ISA
PCI master accesses shadow RAM
PCI Master Burst Read
PCI Master Latency
PCI Master Read Ping-Pong
PCI Master Read Prefetch
PCI Master Write Ping-Pong
PCI Masters' Priority
PCI Mstr Burst Mode
PCI Mstr DEVSEL# Time-out
PCI Mstr Fast Interface
PCI Mstr Post-WR Buffer
PCI Parity Check
PCI Parity Checking
PCI Post Write
PCI Post Write Timing
PCI Posted Write Buffer
PCI Preempt Timer
PCI Preemption Timer
PCI Read/Write Burs
PCI Read/Write Burst
PCI Single Write Merge
PCI Slot IDE 1st(2nd) Channel
PCI Slot n IRQ Priority
PCI Streaming
PCI to ISA Write Buffer
P
PCI Write Burs
PCI Write Burst
PCI Write-byte-Merge
PCI#2 Access #1 Retry
PCI/AGP Clock
PCI/IDE Concurrency
PCI/PNP ISA DMA Resource Exclusion
PCI/PNP ISA IRQ Resource Exclusion
PCI/PNP ISA UMB Region Exclusion
PCI/VGA Palette Snoop
PCI-ISA BCLK Divider
PCI-to-IDE Concurrency
Peer Concurrency
Pentium II Microcode
PERR#
PIIX4 Delayed Transaction
PIIX4 SERR#
Pipeline
Pipeline Cache Timing
Pipelined Function
Pipelining With ByteMerge
Plug & Play O/S
Plug and Play Aware O/S
PM Events
PM Events
PM: Prefetch And Posting
PnP BIOS Auto-Config
PnP OS
PnP OS
P
PNP OS Installed
Port 64/60 Emulation
POST Error Halt
POST Errors
Post Write CAS Active
Power Button Function
Power Button Mode
Power Button Over Ride
Power Fan Speed
Power Management
Power Management
Power Management Mode
Power Management/APM
Power On By Alarm
Power On By Modem
Power On Function
Power Saving Type
Power Savings
Power Supply Type
Power Up by Alarm
Power-Off by PWR-BTTN
Power-On COM1 Ring
Power-On Self Test
PPro to PCI Write Posting
Pre-Boot Events
Preempt PCI Master Option
Primary (Secondary) PCI IDE Status
Primary Display
Primary Display(Perif)
P, Q, R
Primary IDE Post Write Buffer
Primary(Secondary) IDE Channel
Primary(Sec) Master(Sl) ARMD Emulated as
Primary(Secondary) PCI IDE Interface
Processor Number Feature
Processor S/N
Processor Serial Number
PS/2 Mouse
PS/2 Mouse Function Control
PS/2 Mouse Port
PS/2 Mouse Support
PS: Prefetch And Posting
PWR Button < 4 Secs
PWR Lost Resume State
PWR Up On Modem Act
PWR up on PS2 KB/Mouse
PWRON After PWR-Fail
Quick Boot
Quick Boot Mode
Quick Mode
Quick Power On Self Test
Quiet Boot
Quiet Boot
RAM Area
RAMW# Assertion Timing
RAMW# Timing
RAS Active Time
RAS Active Time
RAS Minimum Active
R
RAS Timeout
RAS To Address Delay
RAS to CAS
RAS to CAS Delay Time
RAS to CAS Delay Timing
RAS# Precharge
RAS# Precharge Period
RAS# Precharge Time
RAS# Precharge Timing
RAS# Precharge/Refresh
RAS# Pulse Width
RAS# Pulse Width
RAS# Timing
RAS# to CAS# Address Delay
RAS# to CAS# Delay
RAS-to-CAS Override
Read Pipeline
Read Prefetch Memory RD
Read/Write Turn-Around
Read-Around-Write
Receive Mode
Ref/Act Command Delay
Refresh Assertion
Refresh Cycle Time (us)
Refresh Divider
Refresh During PCI Cycles
Refresh Queue Depth
Refresh RAS Active Time
Refresh RAS Active Time
R
Refresh RAS# Assertion
Refresh Stagger
Refresh Type
Refresh Type Select
Refresh Value
Refresh When CPU Hold
Remote Power On
Report No FDD For WIN 95
Reserved Memory Address
Reserved Memory Base
Reserved Memory Lenght
Reserved Memory Size
Reset Config Data
Reset Configuration Data
Resources Controlled By
Restore on AC/Power Loss
Resume by Alarm
Resume by Ring
Resume On Alarm
Resume On LAN
Resume on PCI Event
RI Resume
Ring Count
Ring Resume From Soft Off
RTC Alarm Resume
RTC Alarm Resume From Soft
RTC Resume